RC28F800C3TC70 View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'RC28F800C3TC70' PDF : 68 Pages View PDF
Intel£ Advanced+ Boot Block Flash Memory (C3)
8.2
AC Write Characteristics
Table 17. Write Operations—8 Mbit Density
Density
8 Mbit
Product
90 ns
110 ns
#
Sym
Parameter
3.0 V – 3.6 V
80
100
Unit
VCC
2.7 V – 3.6 V
90
110
Note Min Min Min Min
W1
tPHWL /
tPHEL
RP# High Recovery to WE# (CE#) Going Low 4,5
150 150 150 150
ns
W2
tELWL /
tWLEL
CE# (WE#) Setup to WE# (CE#) Going Low
4,5
0
0
0
0
ns
W3
tWLWH /
tELEH
WE# (CE#) Pulse Width
4,5
50
60
70
70
ns
W4
tDVWH /
tDVEH
Data Setup to WE# (CE#) Going High
2,4,5 50
50
60
60
ns
W5
tAVWH /
tAVEH
Address Setup to WE# (CE#) Going High
2,4,5 50
60
70
70
ns
W6
tWHEH /
tEHWH
CE# (WE#) Hold Time from WE# (CE#) High 4,5
0
0
0
0
ns
W7
tWHDX /
tEHDX
Data Hold Time from WE# (CE#) High
2,4,5
0
0
0
0
ns
W8
tWHAX /
tEHAX
Address Hold Time from WE# (CE#) High
2,4,5
0
0
0
0
ns
W9
tWHWL /
tEHEL
WE# (CE#) Pulse Width High
2,4,5 30
30
30
30
ns
W10
tVPWH /
tVPEH
VPP Setup to WE# (CE#) Going High
3,4,5 200 200 200 200
ns
W11
tQVVL
VPP Hold from Valid SRD
3,4
0
0
0
0
ns
W12
tBHWH /
tBHEH
WP# Setup to WE# (CE#) Going High
3,4
0
0
0
0
ns
W13
tQVBL
WP# Hold from Valid SRD
3,4
0
0
0
0
ns
W14
tWHGL
WE# High to OE# Going Low
3,4
30
30
30
30
ns
NOTES:
1. Write pulse width (tWP) is defined from CE# or WE# going low (whichever goes low last) to CE# or WE# going high (whichever
goes high first). Hence, tWP = tWLWH = tELEH = tWLEH = tELWH. Similarly, write pulse width high (tWPH) is defined from CE# or
WE# going high (whichever goes high first) to CE# or WE# going low (whichever goes low last). Hence,
tWPH = tWHWL = tEHEL = tWHEL = tEHWL.
2. Refer to Table 7, “Command Bus Operations” on page 24 for valid AIN or DIN.
3. Sampled, but not 100% tested.
4. See Figure 11, “AC Input/Output Reference Waveform” on page 49 for timing measurements and maximum allowable input
slew rate.
5. See Figure 9, “Write Operations Waveform” on page 47.
Datasheet
43
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