SC486
POWER MANAGEMENT
Thermal Considerations
Inserting the following values for VBAT condition (since
(MIN)
The junction temperature of the device may be calculated this is the worst case condition for power dissipation in
as follows:
the controller) as an example):
TJ = TA + PD • θJA °C
Where:
TA = ambient temperature (°C)
PD = power dissipation in (W)
θJA = thermal impedance junction to ambient from
absolute maximum ratings (°C/W)
The power dissipation may be calculated as follows,
assuming that VTT spends 50% of its time sourcing
current and 50% sinking:
PD = VCCA • IVCCA + VDDP • IVDDP
+ Vg • Qg • f + VBST • 1mA • D
+ (VTTIN − VTT)• ITT W
Where:
VCCA = chip supply voltage (V)
IVCCA = operating current (A)
VDDP = gate drive supply voltage (V)
IVDDP = gate drive operating current (A)
Vg = gate drive voltage, typically 5V (V)
Qg = FET gate charge, from the FET datasheet (C)
f = switching frequency (Hz)
VBST = boost pin voltage during tON (V)
D = duty cycle
VTTIN = input voltage for VTT LDO (V)
ITT = maximum VTT current (A)
T = 85°C
A
θJA = 29°C/W
VCCA = VDDP = 5V
IVCCA = 2500µA (data sheet maximum)
I = 150µA (data sheet maximum)
VDDP
Vg = 5V
Qg = 60nC
f = 366kHz
VBAT = 8V
(MIN)
VBST(MIN) = VBAT(MIN)+VDDP = 13V
D1(MIN) = 1.8/8 = 0.225
VDDQ = VTTIN = 1.8V
VTT = 0.9V
ITT = 1.2A
gives us:
PD = 5 • 2500e−6 + 5 • 150e−6
+ 5 • 60e−9 • 366e3 + 13 • 1mA • 0.225
+ (1.8 − 0.9)• 1.2 = 1.206 W
and therefore:
TJ = 85 + 1.206 • 29 = 120°C
As can be seen, the heating effects due to internal power
dissipation are dominated by the VTT LDO, but they can
be managed comfortably by the MLPQ-24 package which
is heatsunk to the ground plane using 4 vias from its
thermal pad.
2006 Semtech Corp.
18
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