SC908 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SC908' PDF : 30 Pages View PDF
SC908
Applications Information (continued)
LDO Regulator
The low-noise low-dropout (LDO) voltage regulator oper-
ates from an LVIN pin input voltage range of 2.2V up to the
battery voltage (V ), and an output voltage from 1.5V to
BAT
3.3V, programmable with external resistors. The SC908
has a VREF bypass pin to enable the user to capacitively
decouple the bandgap reference (10nF recommended)
for very low output noise (50μV typically).
RMS
The output voltage of the LDO regulator is divided exter-
nally using a resistor divider and compared to the buffered
bandgap voltage, typically 0.75V. The error amplifier
drives the gate of a low R P-channel MOSFET pass
DS(ON)
device.
Enabling the LDO
The LDO has an independent enable input pin (active
high). The LDO can be enabled only if V ≥ VT , typi-
LVIN
LUVLO
cally 2.0V, although performance specifications are
guaranteed for VLVIN ≥ 2.2V. The LDO output will settle to
within 5% of its final value in 0.1ms (typically) when the
bandgap reference buffer has already settled (when the
switching regulator is already enabled, or when the charg-
ing adapter is present). A fast start-up circuit is used to
speed the initial charging time of the VREF pin bypass
capacitor. This is done so that the LDO output voltage will
settle to within 5% of its final value in 0.4ms (typically)
when the LDO is the first resource enabled. When the
battery charger is in its precharge mode of operation
(trickle charging of a deeply discharged battery), the LDO
enable signal will be disregarded until fast-charging
begins (at a battery voltage of 2.8V typically). An excep-
tion occurs when either the LDO or switching regulator
are already enabled. At this time when a charging source
is applied and the charger enters precharge mode, the
LDO will remain enabled (or can become enabled).
Precharge mode is indicated by the status outputs. (Refer
to Table 3.)
The LDO provides active shutdown. The capacitance on
LVOUT will be discharged by an on-chip FET when the
LDO is disabled.
Programming the LDO Output Voltage
The LDO regulates its output to obtain 0.75V at the LFB
pin. The output can be programmed to any voltage from
1.5V to 3.3V by an external resistor divider network from
LVOUT to LFB. The output voltage is set by
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LFB is a high impedance input, so large value resistors,
even on the order of 500kΩ, may be used to meet the
noise specification. When considering the effect of LDO
load current on performance specifications, the current
flowing in the feedback divider network should be
included in the load. The LDO is internally compensated.
No feedback capacitor is required for stability.
LDO Dropout
The LDO dropout voltage is the product of the minimum
RDS(ON) of the P-channel MOSFET pass device and the LDO
output current. As V decreases, the achievable source-
LVIN
to-gate voltage of the pass device decreases, so the
minimum achievable RDS(ON) becomes larger. This is the
reason for the two-tier dropout specification. Minimum
R increases with die temperature, which is affected
DS(ON)
not only by LDO power dissipation, but also by switching
regulator and charger power dissipation. The maximum
dropout is specified for a temperature of 85°C.
LDO Reference Voltage
The internal bandgap reference voltage must be exter-
nally bypassed to meet the LDO noise specification. A
10nF ceramic capacitor from the VREF pin to AGND is rec-
ommended to bypass the bandgap reference buffer.
Increasing this capacitor to 100nF will improve power
supply rejection, but at the cost of slower turn-on settling
time. All noise and turn-on settling time specifications
assume that the VREF bypass capacitor is 10nF. Low cost,
low ESR ceramic capacitors such as the X5R and X7R
dielectric material types are recommended.
The bandgap reference is trimmed and buffered to obtain
0.75V typically at the LFB pin with respect to AGND while
the LDO is operating. V is the reference voltage for LFB,
VREF
so V will be equal to V within the offset error of the
VREF
LFB
LDO feedback error amplifier. The bandgap reference and
reference buffer are powered from the greater of V
VSYS
(derived from VAD, when present) and V (the battery
BAT
voltage). The PSRR specification is with respect to V .
REF
BAT
It is evaluated while the charging adapter is not present.
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