SML2108 View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
'SML2108' PDF : 21 Pages View PDF
SML2108
PRELIMINARY
BUS INTERFACE
GENERAL DESCRIPTION
The I2C bus is a two-way, two-line serial communication
between different integrated circuits. The two lines are: a
serial Data line (SDA) and a serial Clock line (SCL). All
Summit Microelectronics parts support a 100kHz clock
rate, and some support the alternative 400kHz clock.
Check the AC Electrical Table for the value of fSCL. The
SDA line must be connected to a positive supply by a pull-
up resistor located on the bus. Summit parts have a
Schmitt input on both lines. See Figure X1 and Table X1
for waveforms and timing on the bus. One bit of Data is
transferred during each Clock pulse. The Data must
remain stable when the Clock is high.
tR
tF
tHIGH
tLOW
SCL
tSU:SDA
tHD:SDA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
SDA In
tAA
tDH
SDA Out
2053 Fig08
Symbol
Parameter
fSCL
tLOW
tHIGH
tBUF
tSU:STA
tHD:STA
tSU:STO
tAA
tDH
tR
t
F
tSU:DAT
tHD:DAT
TI
SCL clock frequency
Clock low period
Clock high period
Bus free time
Start condition setup time
Start condition hold time
Stop condition setup time
Clock edge to valid output
Data Out hold time
SCL and SDA rise time
SCL and SDA fall time
Data In setup time
Data In hold time
Noise filter SCL and SDA
tWR
Write cycle time
SUMMIT MICROELECTRONICS, Inc.
Figure 8. I2C Data Timing
Conditions
Min.
0
4.7
4.0
Before new transmission
4.7
4.7
4.0
4.7
SCL low to valid SDA (cycle n)
0.3
SCL low (cycle n+1) to SDA change
0.3
250
0
Noise suppression
Table 1. I2C Data Timing
2053 2.2 11/07/00
Max.
100
3.5
1000
300
100
5
Units
kHz
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ms
2053 Table01 1.0
13
Share Link: 
