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SN260 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
SN260
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'SN260' PDF : 88 Pages View PDF
Functional description
SN260
5.2
5.2.1
5.2.2
Transmit (TX) path
The SN260 transmitter utilizes both analog circuitry and digital logic to produce the O-QPSK
modulated signal. The area-efficient TX architecture directly modulates the spread symbols
prior to transmission. The differential signal paths increase noise immunity and provide a
common interface for the external balun.
TX baseband
The SN260 TX baseband (within the digital domain) performs the spreading of the 4-bit
symbol into its IEEE 802.15.4-2003-defined 32-chip I and Q sequence. In addition, it
provides the interface for software to perform the calibration of the TX module in order to
reduce process, temperature, and voltage variations.
TX_ACTIVE signal
Even though the SN260 provides an output power suitable for most ZigBee applications,
some applications will require an external power amplifier (PA). Due to the timing
requirements of IEEE 802.15.4-2003, the SN250 provides a signal, TX_ACTIVE, to be used
for external PA power management and RF Switching logic. When in TX, the TX Baseband
drives TX_ACTIVE high (as described inTable 6). When in RX, the TX_ACTIVE signal is
low. If an external PA is not required, then the TX_ACTIVE signal should be connected to
GND through a 100k Ohm resistor, as shown in the application circuit in Figure 12.
5.3
Integrated MAC module
The SN260 integrates critical portions of the IEEE 802.15.4-2003 MAC requirements in
hardware. This allows the SN260 to provide greater bandwidth to application and network
operations. In addition, the hardware acts as a first-line filter for non-intended packets. The
SN260 MAC utilizes a DMA interface to RAM memory to further reduce the overall micro
controller interaction when transmitting or receiving packets.
When a packet is ready for transmission, the software configures the TX MAC DMA by
indicating the packet buffer RAM location. The MAC waits for the backoff period, then
transitions the baseband to TX mode and performs channel assessment. When the channel
is clear, the MAC reads data from the RAM buffer, calculates the CRC, and provides 4-bit
symbols to the baseband. When the final byte has been read and sent to the baseband, the
CRC remainder is read and transmitted.
The MAC resides in RX mode most of the time, and different format and address filters keep
non-intended packets from using excessive RAM buffers, as well as preventing the SN260
CPU from being interrupted. When the reception of a packet begins, the MAC reads 4-bit
symbols from the baseband and calculates the CRC. It assembles the received data for
storage in a RAM buffer. A RX MAC DMA provides direct access to the RAM memory. Once
the packet has been received, additional data is appended to the end of the packet in the
RAM buffer space. The appended data provides statistical information on the packet for the
software stack.
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