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SPT5420 View Datasheet(PDF) - Cadeka Microcircuits LLC.

Part Name
Description
MFG CO.
SPT5420
CADEKA
Cadeka Microcircuits LLC. CADEKA
'SPT5420' PDF : 8 Pages View PDF
1 2 3 4 5 6 7 8
ELECTRICAL SPECIFICATIONS
TA = TMIN to TMAX, VCC = +5.0 V, VDD = +11.5 V, VSS = 8.0 V, VREFT=3.5 V, VREFB=1.5 V, RL = +10 k, CL = 50 pF, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL
SPT5420
MIN
TYP
MAX
UNITS
Power Requirements
VCC Supply Voltage (Digital)
VDD Supply Voltage (Analog)1,2
VSS Supply Voltage (Analog)1,2
ICC Supply Current
IDD Supply Current
ISS Supply Current
Power Supply Rejection Ratio
Outputs Unloaded
Outputs Unloaded
VDD / Full Scale
VSS / Full Scale
Dynamic Performance
Output Settling Time3
(Full Scale Change to ±0.5 LSB) CL 220 pF
Slew Rate
Glitch Impulse
Channel to Channel Isolation
DAC to DAC Crosstalk
Digital Crosstalk
Digital Feedthrough
IV
4.75
VI
5
VI
12.5
VI
VI
VI
IV
IV
IV
V
V
V
V
V
V
5
11.5
8
5
5
80
80
2.0
35
100
40
1
1
5.25
V
12.5
V
5
V
0.5
mA
10
mA
10
mA
dB
dB
15
µs
V/µs
nV-s
dB
nV-s
nV-s
nV-s
Timing Characteristics
(See page 4)
IV
1. Supplies should provide 2.5 V headroom above and below max output swing.
2. VDD VSS 20 V
3. Output can drive 10,000 pF without oscillation, but with settling time degradation.
DEFINITION OF SELECTED TERMINOLOGY
Channel-to-Channel Isolation
Channel-to-Channel isolation refers to the proportion of input signal from one DACs reference input that appears at the output of
the other DAC. It is expressed in dBs.
DAC-to-DAC Crosstalk
DAC-to-DAC crosstalk is defined as the glitch impulse that appears at one DACs output due to both the digital change and subse-
quent analog output change at any other DAC. It is specified in nV-s.
Digital Crosstalk
The glitch impulse transferred to one DACs output due to a change in digital input code of any other DAC. It is specified in nV-s.
Digital Feedthrough
Digital feedthrough is the noise at a DACs output caused by changes to D0D12 while WR is high.
TEST LEVEL CODES
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications
are guaranteed. The Test Level column indi-
cates the specific device testing actually per-
formed during production and Quality Assur-
ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.
LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at TA = +25 °C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characteri-
zation data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25 °C. Parameter is guaranteed
over specified temperature range.
SPT5420
3
6/26/01
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