ST18-AU1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST18-AU1' PDF : 87 Pages View PDF
ST18-AU1
Figure 3.2 ST18-AU1 block diagram
ST18-AU1
P0-7
MODE_RESET
VCC
LP
RESET
GND
IRQ
Interrupt
controller
DMA
controller
TAP
9
IEEE 1149.1
JTAG interface
Clocks
(13 pins)
Clocks and
timers
HCL
HDA
HSAS
(I2C host interface)
Host
interface
IT
D950
DSP
core
I-bus
16K Program
memory
X-bus
16K X-data
memory
Direct I bus
(35 pins)
Y-bus
Bus switch
unit
Direct X / bus
switch
(39 pins)
DIN
WSDIN
CLKDIN
DREQ
2
Input serial
interfaces
3
Output serial
interfaces
IEC-958
(S/PDIF)
output
8K Y-data
memory
PCM_OUT WSPCM
SCLKPCM
SPDIFOUT
(AC-3/MPEG or PCM)
Host interface
The I2C serial bus interface operated in slave mode enables connection to an external host
processor. It receives operating commands, and returns host requested bitstream information
and internal status.
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