ST18-AU1
Input serial interface
The ST18-AU1 has two input serial interfaces. The interfaces are multi-format serial interfaces
for inputting audio bitstreams. Supported formats include delayed (I2S)/non-delayed, left/right
justified, 16/18/20/24-bit word, polarity options in L/R clock and input clock, and master/slave
mode. They provide the serial to parallel conversion and transfer the input data to the input
buffer for further processing.
Output serial interface
The ST18-AU1 has three output serial interfaces. The output serial interfaces organize the
PCM audio output into the required I2S serial format and generate all the DAC control signals.
IEC-958 transmitter
The IEC-958 transmitter accepts either the AC-3/MPEG bitstream or the decoded audio output
PCM data, and formats the input in accordance with the IEC-958 (S/PDIF) specification for
output.
Interrupt controller (ITC)
The interrupt controller (ITC) manages the interrupts from the clocks and timers unit, the host
interface, and the external interrupt for the DSP core. The interrupt can be activated and
programmed as edge or level triggered.
DMA controller (DMAC)
The DMA controller (DMAC) controls data transfer between data input/output and internal data
buffers.
D950 DSP Core
The D950-Core is a general purpose programmable 16-bit fixed point Digital Signal Processor
Core. The main blocks of the D950-Core include an arithmetic data calculation unit, a program
control unit and an address calculation unit, able to manage up to 64k (program) and 128k
(data) x 16-bit memory spaces.
The DSP core processes all host commands, performs input bitstream parsing,
decompression, sample down-mixing and/or subsampling, as well as input and output control.
Memory
There is 8 Kword Y-data memory on Y space, 16 Kword X-data memory on X space and 16
Kword instruction memory on I space.
Memory can be extended off-chip in one of three ways:
• Direct I-bus extension.
• Direct X-bus extension.
• I, X and Y -bus extension through the bus switch unit.
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