ST18D952 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST18D952' PDF : 67 Pages View PDF
ST18952
13 JTAG IEEE 1149.1 test access port
The Test Access Port (TAP) conforms to IEEE standard 1149.1.
The TAP consists of five pins: TMS, TCK, TDI, TDO and TRST. TDO can be overdriven to the
power rails, and TCK can be stopped in either logic state.
The instruction register is 8 bits long, with no parity, and the pattern “00000001” is loaded into
the register during the Capture-IR state.
There are three defined public instructions, see Table 13.1. All other instruction codes are
reserved.
Table 13.1 Instruction codes
Instruction code1)
04h
08h
FFh
Instruction
IDCODE
EMU
BYPASS
Selected register
Identification
D950 IOscan
Bypass
Notes 1: MSB... LSB; LSB closest to TDO
14 Emulation Unit
The emulation unit (EMU) performs to emulation and test fuctions through the external IEEE
1149.1 JTAG interface. Refer to ”JTAG IEEE 1149.1 test access port” on page 46.
The emulation and test operations are controlled by the JTAG Test Access Port (TAP) and the
emulator by means of dedicated control I/Os.
Emulation mode can entered in one of two ways:
• Asserting ERQ input pin low.
• Meeting a valid breakpoint condition or executing an instruction in single step
mode.
The PC board emulator is able to display the processor status (memories and registers) and
restore the context.
The Emulation resources (see Figure 14.1) include:
• Four breakpoint registers (BP0, BP1, BP2, BP3) which can be affected by
Program or Data memory.
• Breakpoint counter (BPC).
• Program Counter Trace Buffer (PCB) able to store the address of the 6 last
executed instructions.
• Three control registers for Breakpoint condition programming.
46/66
Share Link: 
