ST20-C1 View Datasheet(PDF) - STMicroelectronics
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MFG CO.
'ST20-C1' PDF : 205 Pages View PDF
6.4 Initial exception handler state
The control block is at the initial Wptr for the exception handler, so the locations are
word offsets from the initial Wptr of the exception handler. The initial Wptr is the
address of the exception control block which is the address part of the entry in the
exception vector table.
6.4 Initial exception handler state
When the exception handler starts, Wptr is set to the address of the exception control
block. The work space of the exception handler is normally below the control block, so
like a function or procedure call, one of the first actions of the exception handler code
is to adjust the Wptr downwards to create space for local variables using ajw. The
Wptr must be adjusted back up again before the handler returns.
The initial Iptr of the exception handler is the value loaded from ex.HandlerIptr in the
exception control block. The state of the interrupted or trapped process is saved in the
exception control block. If the exception is an idle trap then the saved state is the state
of the last descheduled process. Initially the status register is set to the values shown
in Table 6.4.
Field or bit
mac_count
mac_buffer
mac_scale
mac_mode
global_interrupt_enable
local_interrupt_enable
overflo w
underflo w
carry
user_mode
interrupt_mode
trap_mode
sleep
reserved
start_next_task
timeslice_enable
timeslice_count
Value
As in the interrupted or trapped process.
As in the interrupted or trapped process.
As in the interrupted or trapped process.
As in the interrupted or trapped process.
False if exception is a trap, otherwise preserved.
As in the interrupted or trapped process.
False.
False.
False.
False.
True if any interrupts are running, false otherwise.
True if exception is a trap, false otherwise.
False.
Undefined.
False.
False.
As in the interrupted or trapped process.
Table 6.4 Exception handler initial status register
If the exception handler is interrupting a user process, then the address of the
exception control block (i.e. the user process state) is left in Tdesc. If necessary, the
exception handler can save this address. If a sequence of nested interrupts has
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