ST20-C1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST20-C1' PDF : 205 Pages View PDF
7 Multi-tasking
A process state is held in memory and the CPU registers. Sufficient of the register
state must be saved when the process is interrupted or a context switch occurs, so
that the process can be reloaded and continue execution at a later time. The register
state consists of:
• the instruction pointer register;
• the work space pointer register;
• the task descriptor register;
• the evaluation stack registers;
• the status register.
In order to save memory space and context switch time, processes are only desched-
uled when the evaluation stack and status register are empty. This is achieved by only
allowing processes to deschedule at certain instructions, called deschedule instruc-
tions, after which the final values in the evaluation stack are undefined and the status
register is reset to a default value. The deschedule instructions are stop and timeslice.
Table 7.2 lists the multi-tasking instructions.
Mnemonic
Name
run
Run process
stop
Stop process
timeslice
Timeslice
ldtdesc
Load task descriptor
enqueue
Enqueue a process
dequeue
Dequeue a process
Table 7.2 Multi-tasking instructions
7.2 Descheduled processes
If the process is waiting for a peripheral or a semaphore or descheduled by a timeslice
then the evaluation stack is not saved. The instruction pointer and Wptr are saved in
the process descriptor block. The task descriptor is the address of the process
descriptor block. It therefore identifies the waiting process and points to its saved
state. The task descriptor is a fixed address for each process, unlike the Wptr which
changes as the code executes. When the process is running, the task descriptor is
held in the Tdesc register.
Word offset
2
1
0
Slot name
Purpose
pw.Iptr
The process saved instruction pointer.
pw.Wptr
The process saved work space pointer.
pw.Link
The link to the next process in the queue.
Table 7.1 Process descriptor block
79/205
®
Share Link: 
