ST486SMM View Datasheet(PDF) - STMicroelectronics
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MFG CO.
'ST486SMM' PDF : 34 Pages View PDF
ST486DX - SMM SOFTWARE CONSIDERATIONS
out 22h, al
;select
mov al, 083h
;set SMM lower addr. 80h, 16K
out 23h, al
;write value
mov al, 0c1h
;index to CCR1
out 22h, al
;select CCR1 register
in al, 23h
;read current CCR1 value
mov ah, al
;save it
mov al, 0c1h
;index to CCR1
out 22h, al
;select CCR1 register
mov al, ah
or al, SMI or SMAC; set SMI and SMAC
out 23h, al
;new value now in CCR1, SMM now
;mapped in
mov ax, SMMBASE shr 4
mov es, ax
mov edi, 0
;es:di = start of the SMM area
mov esi, offset SMI_ROUTINE ;start of copy of SMM
mov ax, seg SMI_ROUTINE
;routine in main memory
mov ds, ax
mov ecx, (SMI_ROUTINE_LENGTH+3)/4 ;calc. length
; this line copies the SMM routine from DS:ESI to ES:EDI
rep
movs dword ptr es:[edi],dword ptr ds:[esi]
; now disable SMI by clearing SMAC and SMI
mov al, 0c1h
;index to CCR1
out 22h, al
;select CCR1 register
mov al, ah
;AH is still old value
and al, NOT SMAC ;disable SMAC, enable SMI#
out 23h, al
;write new value to CCR
3.2 SMM Handler Entry State
At the beginning of the SMM routine, before control is transferred to code executing at the SMM
base, certain portions of the CPU state are saved at the top of SMM memory. To optimize the
speed of SMM entry and exit, the CPU saves the minimum CPU state information necessary for an
SMI interrupt handler to execute and return to the interrupted context. The information is saved to
the SMM header at the top of the defined SMM region (starting at SMM base + size - 30h) as
shown in Figure-3-1. Of the typically used program registers only the CS, IP, EFLAGS, CR0, and
DR7 are saved upon entry to SMM. This requires that data accesses use a CS segment override to
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