ST486SMM View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST486SMM' PDF : 34 Pages View PDF
ST486DX - SMM SOFTWARE CONSIDERATIONS
The values found in the I/O trap information fields are specified below for all cases.
Table 3 - 2 Valid I/O Trap Cases
Valid Cases
not an I/O ins.
IN
INS
REP INS
OUT al
OUT ax
OUT eax
OUTSB
OUTSW
OUTSD
REP OUTSB
REP OUTSW
REP OUTSD
P
I
I/O Write
Data Size
x xx
0 0x
0 0x
1 0x
0 1 01h
0 1 03h
0 1 0Fh
0 1 01h
0 1 03h
0 1 0Fh
1 1 01h
1 1 03h
1 1 0Fh
I/O Write
Address
x
x
x
x
I/O Address
I/O Address
I/O Address
I/O Address
I/O Address
I/O Address
I/O Address
I/O Address
I/O Address
I/O Write
Data
x
x
x
x
xxxxxxdd
xxxxdddd
dddddddd
xxxxxxdd
xxxxdddd
dddddddd
xxxxxxdd
xxxxdddd
dddddddd
ESI or
EDI
x
EDI
EDI
EDI
ESI
ESI
ESI
ESI
ESI
ESI
ESI
ESI
ESI
x: invalid
Upon SMM entry, the CPU enters the following state:
Table 3 - 3 SMM Entry State
CS
EIP
EFLAGS
CR0
DR7
SMM base specified by SMAR, CS limit is set to 4 GBytes
0000 0000h; Begins execution at the base of SMM memory
0000 0002h; Reset State
6000 0010h; Real Mode, Cache in Write Through
0000 0400h; Traps disabled
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