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ST486SMM View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST486SMM
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'ST486SMM' PDF : 34 Pages View PDF
ST486DX - SMM SOFTWARE CONSIDERATIONS
3.3 Maintaining the CPU State
The following registers are not automatically saved/restored on SMM entry/exit.
General Purpose Registers:
Pointer and Index Registers:
Selector/Segment Registers:
Descriptor Table Registers:
Control Registers:
Debug Registers:
Configuration Registers:
FPU Registers:
EAX, EBX, ECX, EDX
EBP, ESI, EDI, ESP
DS, ES, SS, FS, GS
GDTR, IDTR, LDTR, TR
CR2, CR3
DR0, DR1, DR2, DR3, DR6
CCR1, CCR2, CCR3, SMAR
Entire FPU state.
If any of these registers need to be used by the SMM routine, the registers need to be saved after en-
try to the SMM routine and then restored prior to exit from SMM. Additionally, if power is to be
removed from the CPU and the system is required to return to the same system state after power is
reapplied, then the entire CPU state must be saved to a non-volatile memory subsystem such as a
hard disk.
3.3.1 Maintaining Common CPU Registers
The following is an example of the instructions needed to save the entire CPU state and restore it.
This code sequence will work from real mode if the conditions needed to execute SGS-Thomson
SMM instructions are met (see Section 2.3).
; Save and Restore the common CPU registers.
; The information automatically saved in the
; header on entry to SMM is not saved again.
include SMIMAC.INC
.386P
;required for SMIMAC.INC macro
mov cs:save_eax,eax
mov cs:save_ebx,ebx
mov cs:save_ecx,ecx
mov cs:save_edx,edx
mov cs:save_esi,esi
mov cs:save_edi,edi
mov cs:save_ebp,ebp
mov cs:save_esp,esp
svdc cs:,save_ds,ds
svdc cs:,save_es,es
svdc cs:,save_fs,fs
svdc cs:,save_gs,gs
svdc cs:,save_ss,ss
svldt cs:,save_ldt
;sldt is not valid in real mode
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