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ST6285B View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'ST6285B' PDF : 78 Pages View PDF
ST62T85B/E85B
A/D CONVERTER (Cont’d)
Since the ADC is on the same chip as the micro-
processor, the user should not switch heavily load-
ed output signals during conversion, if high preci-
sion is required. Such switching will affect the sup-
ply voltages used as analog references.
The accuracy of the conversion depends on the
quality of the power supplies (VDD and VSS). The
user must take special care to ensure a well regu-
lated reference voltage is present on the VDD and
VSS pins (power supply voltage variations must be
less than 5V/ms). This implies, in particular, that a
suitable decoupling capacitor is used at the VDD
pin.
The converter resolution is given by::
up the microcontroller could also be done using
the Timer interrupt, but in this case the Timer will
be working and the resulting noise could affect
conversion accuracy.
A/D Converter Control Register (ADCR)
Address: 0D1h — Read/Write
7
0
EAI EOC STA PDS D3 D2 D1 D0
Bit 7 = EAI: Enable A/D Interrupt. If this bit is set to
“1” the A/D interrupt is enabled, when EAI=0 the
interrupt is disabled.
Bit 6 = EOC: End of conversion. Read Only. This
V-----D---D----------V----S---S--
) 256
ct(s The Input voltage (Ain) which is to be converted
u must be constant for 1µs before conversion and
rod remain constant during conversion.
Conversion resolution can be improved if the pow-
P er supply voltage (VDD) to the microcontroller is
te lowered.
le In order to optimise conversion resolution, the user
o can configure the microcontroller in WAIT mode,
s because this mode minimises noise disturbances
b and power supply variations due to output switch-
O ing. Nevertheless, the WAIT instruction should be
- executed as soon as possible after the beginning
) of the conversion, because execution of the WAIT
t(s instruction may cause a small variation of the VDD
voltage. The negative effect of this variation is min-
c imized at the beginning of the conversion when the
u converter is less sensitive, rather than at the end
d of conversion, when the less significant bits are
ro determined.
P The best configuration, from an accuracy stand-
te point, is WAIT mode with the Timer stopped. In-
deed, only the ADC peripheral and the oscillator
le are then still working. The MCU must be woken up
o from WAIT mode by the ADC interrupt at the end
Obs of the conversion. It should be noted that waking
read only bit indicates when a conversion has
been completed. This bit is automatically reset to
“0” when the STA bit is written. If the user is using
the interrupt option then this bit can be used as an
interrupt pending bit. Data in the data conversion
register are valid only when this bit is set to “1”.
Bit 5 = STA: Start of Conversion. Write Only. Writ-
ing a “1” to this bit will start a conversion on the se-
lected channel and automatically reset to “0” the
EOC bit. If the bit is set again when a conversion is
in progress, the present conversion is stopped and
a new one will take place. This bit is write only, any
attempt to read it will show a logical zero.
Bit 4 = PDS: Power Down Selection. This bit acti-
vates the A/D converter if set to “1”. Writing a “0” to
this bit will put the ADC in power down mode (idle
mode).
Bit 3-0 = D3-D0. Not used
A/D Converter Data Register (ADR)
Address: 0D0h — Read only
7
0
D7 D6 D5 D4 D3 D2 D1 D0
Bit 7-0 = D7-D0: 8 Bit A/D Conversion Result.
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