ST6391 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST6391' PDF : 68 Pages View PDF
ST6391,92,93,95,97,99
ON-SCREEN DISPLAY (Continued)
Figure 58. Display Character Register
Explanation
Display Character
See Data RAM Table Description
for specific Addresses
( Write Only)
D7 D6 D5 D4 D3 D2 D1 D0
C5-C0 = Character Types
control Bit
Fixed to “0”
Unused
D6. This bit is fixed to “0”.
C5-C0. Character type. The 6 character type bits
define one of the 64 available character types.
These character types are shown on the following
pages.
Character Types
The character set is user defined as ROM mask
option.
Register and RAM Addressing
The OSD contains seven registers and 80 RAM lo-
cations. The seven registers are the Vertical Start
Address register, Horizontal Start Address regis-
ter, Vertical Space register, Horizontal Space reg-
ister, Background Control register, Global Enable
register and Character Bank Select register. The
Global Enable register can be written at any time
by the ST639x Core. The other six registers and
the RAM can only be read or written to if the global
enable is zero.
The six registers and the RAM are located on two
pages of the paged memory of the ST639x MCUs;
the Character Bank Select register is located out-
side the paged memory at address EDh. Each
page contains 64 memory locations. This paged
memory is at memory locations 00h to 3Fh in the
ST639x memory map. A page of memory is en-
abled by setting the desired page bit, located in the
Data Ram Bank Register, to a one. The page reg-
ister is location E8h. A one in bit five selects page
5, located on the OSD and a one in bit 6 selects
page 6 on the OSD. Table 12 shows the addresses
of the OSD registers and RAM.
Table 12. OSD Control Registers and Data
RAM Addressing
Page Address
Register or RAM
5
00h - 3Fh
RAM Locations 00h - 3Fh
6
00h - 0Fh
RAM Locations 00h - 0Fh
6
10h
Vertical Start Register
6
11h
Horizontal Start Register
6
12h
Vertical Space Register
6
13h
Horizontal Space Register
6
14h
Background Control Register
6
17h
Global Enable Register
No
Page
EDh
Character Bank Select Register
OSD Global Enable Register
This register contains the global enable bit (GE). It
is the only register that can be written at any time
regardless of the state of the GE bit. It is a write
only register.
Figure 59. Global Enable Bit
Global Enable
Registe r
17h - Page 6
( Write Only)
D7 D6 D5 D4 D3 D2 D1 D0
GE = Global Enable Bit
Unuse d
D7-D1. These bits are not used
GE. Global Enable. This bit allows the entire dis-
play to be turned off.
“0” - The entire display is disabled. The RAM and
other registers of the OSD can be accessed by
the Core.
“1” - Display of words is controlled by the word en-
able bits (WE) located in the format or space
character. The other registers and RAM can-
not be accessed by the Core.
46/64
®
Share Link: 
