ST72124J View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST72124J

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES

STMicroelectronics 

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ST72334J/N, ST72314J/N, ST72124J

6.2 MISCELLANEOUS REGISTERS

The miscellaneous registers allow control over

several different features such as the external in-

terrupts or the I/O alternate functions.

6.2.1 I/O Port Interrupt Sensitivity Description

The external interrupt sensitivity is controlled by

the ISxx bits of the MISCR1 miscellaneous regis-

ter. This control allows to have two fully independ-

ent external interrupt source sensitivities.

Each external interrupt source can be generated

on four different events on the pin:

s Falling edge

s Rising edge

s Falling and rising edge

s Falling edge and low level

To guarantee correct functionality, the sensitivity

bits in the MISCR1 register must be modified only

when the I bit of the CC register is set to 1 (inter-

rupt masked). See I/O port register and Miscella-

neous register descriptions for more details on the

programming.

6.2.2 I/O Port Alternate Functions

The MISCR registers manage four I/O port miscel-

laneous alternate functions:

s Main clock signal (fCPU) output on PF0

s A beep signal output on PF1 (with 3 selectable

audio frequencies)

s SPI pin configuration:

– SS pin internal control to use the PC7 I/O port

function while the SPI is active.

These functions are described in detail in the Sec-

tion 6.2.3 Miscellaneous Registers Description.

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