ST72334J/N, ST72314J/N, ST72124J
MEMORY AND PERIPHERAL CHARACTERISTICS (Cont’d)
Figure 60. SPI Master Timing Diagram CPHA=0, CPOL=1 1)
SS
(INPUT)
SCK
(OUTP UT)
MISO
(INPU T)
MOSI
(OUTPU T)
1
5
D7-IN
6
7
D7-OUT
10
11
13
4
D6-IN
D6-OUT
Figure 61. SPI Master Timing Diagram CPHA=1, CPOL=0 1)
SS
(INPUT)
SCK
(OUTP UT)
MISO
(INPU T)
MOSI
(OUTPU T)
1
4
6
10
5
D7-OUT
7
D7-IN
11
13
D6-OUT
D6-IN
Figure 62. SPI Master Timing Diagram CPHA=1, CPOL=1 1)
SS
(INPUT)
SCK
(OUTPUT)
MIS O
(IN PUT)
MOSI
(OUTPUT)
1
5
4
D7-IN
6
7
D7-OUT
10
11
12
D6-IN
D6-OUT
12
D0-IN
D0-OUT
12
D0-OUT
D0-IN
13
D0-IN
D0-OUT
Note:
1) Measurement points are VOL, VOH, VIL and VIH in the SPI timing diagram.
VR000110
VR000107
VR000108
113/125