ST7LITE0xY0, ST7LITESxY0
12-BIT AUTORELOAD TIMER (Cont’d)
PWM OUTPUT CONTROL REGISTER (PWMCR)
Read/Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0
0
0
0
OE0
Bits 7:1 = Reserved, must be kept cleared.
Bit 0 = OE0 PWM0 Output enable.
This bit is set and cleared by software.
0: PWM0 output Alternate Function disabled (I/O
pin free for general purpose I/O)
1: PWM0 output enabled
Table 14. Register Map and Reset Values
Address
(Hex.)
0D
0E
0F
10
11
12
13
17
18
Register
Label
ATCSR
Reset Value
CNTRH
Reset Value
CNTRL
Reset Value
ATRH
Reset Value
ATRL
Reset Value
PWMCR
Reset Value
PWM0CSR
Reset Value
DCR0H
Reset Value
DCR0L
Reset Value
7
0
0
CN7
0
0
ATR7
0
0
0
0
DCR7
0
6
0
0
CN6
0
0
ATR6
0
0
0
0
DCR6
0
5
0
0
CN5
0
0
ATR5
0
0
0
0
DCR5
0
4
3
2
1
0
CK1
0
0
CN4
0
0
ATR4
0
0
0
0
DCR4
0
CK0
0
CN11
0
CN3
0
ATR11
0
ATR3
0
0
OVF
0
CN10
0
CN2
0
ATR10
0
ATR2
0
0
0
0
DCR11
0
DCR3
0
DCR10
0
DCR2
0
OVFIE
0
CN9
0
CN1
0
ATR9
0
ATR1
0
0
OP
0
DCR9
0
DCR1
0
CMPIE
0
CN8
0
CN0
0
ATR8
0
ATR0
0
OE0
0
CMPF0
0
DCR8
0
DCR0
0
58/124
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