ST7LITE0xY0, ST7LITESxY0
OPERATING CONDITIONS (Cont’d)
Figure 54. PLLx4 Output vs CLKIN frequency
7.00
6.00
5.00
3.3
4.00
3
3.00
2.7
2.00
1.00
1
1.5
2
2.5
3
External Input Clock Frequency (MHz)
Note: fOSC = fCLKIN/2*PLL4
Figure 55. PLLx8 Output vs CLKIN frequency
11.00
9.00
7.00
5.5
5
5.00
4.5
4
3.00
1.00
0.85 0.9
1
1.5
2
2.5
External Input Clock Frequency (MHz)
Note: fOSC = fCLKIN/2*PLL8
88/124
1