ST7FLITE02Y1B6 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7FLITE02Y1B6
STMicroelectronics
'ST7FLITE02Y1B6' PDF : 124 Pages View PDF
13.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fOSC, and TA.
13.5.1 General Timings
Symbol
Parameter 1)
Conditions
tc(INST)
tv(IT)
Instruction cycle time
Interrupt reaction time 3)
tv(IT) = ∆tc(INST) + 10
fCPU=8MHz
fCPU=8MHz
ST7LITE0xY0, ST7LITESxY0
Min
2
250
10
1.25
Typ 2)
3
375
Max
12
1500
22
2.75
Unit
tCPU
ns
tCPU
µs
13.5.2 External Clock Source
Symbol
VCLKINH
VCLKINL
tw(CLKINH)
tw(CLKINL)
tr(CLKIN)
tf(CLKIN)
IL
Parameter
CLKIN input pin high level voltage
CLKIN input pin low level voltage
CLKIN high or low time 4)
CLKIN rise or fall time 4)
CLKIN Input leakage current
Conditions
see Figure 61
VSS≤VIN≤VDD
Min
Typ
0.7xVDD
VSS
15
Max
VDD
0.3xVDD
Unit
V
ns
15
±1
µA
Notes:
1. Guaranteed by Design. Not tested in production.
2. Data based on typical application software.
3. Time measured between interrupt event and interrupt vector fetch. ∆tc(INST) is the number of tCPU cycles needed to fin-
ish the current instruction execution.
4. Data based on design simulation and/or technology characteristics, not tested in production.
Figure 61. Typical Application with an External Clock Source
VCLKINH
VCLKINL
90%
10%
tr(CLKIN)
tfCLKIN)
tw(CLKINH)
tw(CLKINL)
EXTERNAL
CLOCK SOURCE
CLKIN
fOSC
IL
ST72XXX
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