ST7FLITE02Y1B6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7FLITE02Y1B6

8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, timers, SPI

STMicroelectronics 

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ST7LITE0xY0, ST7LITESxY0

13.4 SUPPLY CURRENT CHARACTERISTICS

The following current consumption specified for

the ST7 functional operating modes over tempera-

ture range does not take into account the clock

source current consumption. To get the total de-

vice consumption, the two current values must be

added (except for HALT mode for which the clock

is stopped).

13.4.1 Supply Current

TA = -40 to +85°C unless otherwise specified

Symbol

Parameter

Supply current in RUN mode

Supply current in WAIT mode

Supply current in SLOW mode

IDD Supply current in SLOW WAIT mode

Supply current in HALT mode 5)

Conditions

fCPU=8MHz 1)

fCPU=8MHz 2)

fCPU=250kHz 3)

fCPU=250kHz 4)

-40°C≤TA≤+85°C

-40°C≤TA≤+105°C

TA= +85°C

Typ Max Unit

4.50 7.00

1.75 2.70

mA

0.75 1.13

0.65 1

0.50 10

TBD TBD

µA

5 100

Notes:

1. CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals

in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

2. All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN)

driven by external square wave, LVD disabled.

3. SLOW mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at VDD or

VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

4. SLOW-WAIT mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at

VDD or VSS (no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.

5. All I/O pins in output mode with a static value at VSS (no load), LVD disabled. Data based on characterization results,

tested in production at VDD max and fCPU max.

Figure 56. Typical IDD in RUN vs. fCPU

Figure 57. Typical IDD in SLOW vs. fCPU

5.0

8MHz

4.0

4MHz

1MHz

3.0

2.0

1.0

0.0

2.4

2.7

3.7

4.5

5

5.5

Vdd (V)

0.80

250kHz

0.70

0.60

125kHz

0.50

62.5kHz

0.40

0.30

0.20

0.10

0.00

2.4

2.7

3.7

4.5

5

5.5

Vdd (V)

89/124

1

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