ST7FLU05MCE View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7FLU05MCE

8-bit low cost, low pin-count MCU for automotive, with single voltage Flash memory, ADC, timers

STMicroelectronics 

Prev 51 52 53 54 55 56 57 58 59 60 Next

Power saving modes

ST7LUS5, ST7LU05, ST7LU09

Figure 26. AWUFH mode flowchart

HALT instruction

(active halt disabled)

(AWUCSR.AWUEN=1)

Enable

Watchdog

WDGHALT(1)

0

Disable

1

AWU RC OSC On

Watchdog

t(s) reset

Main OSC

Off

Peripherals(2) Off

CPU

Off

I[1:0] bits

10

duc N

ro Reset

P t(s) N

Y

te c Interrupt(3)

le u AWU RC OSC Off

d Y

Main OSC

On

so ro Peripherals

Off

CPU

b P I[1:0] bits

On

XX(4)

) - O lete 64 CPU clock

t(s ocycle delay

c bsAWU RC OSC

u O Main OSC

d - Peripherals

ro ) CPU

P t(s I[1:0] bits

Off

On

On

On

XX(4)

lete uc Fetch reset vector

d or service interrupt

bso Pro 1. WDGHALT is an option bit. See option bytes in Section 14.1.1: Flash configuration for more details.

O te2. Peripheral clocked with an external clock source can still be active.

le3. Only an AWUFH interrupt and some specific interrupts can exit the MCU from halt mode (such as external

interrupt). Refer to Table 15: Interrupt mapping on page 46 for more details.

so 4. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are

b set to the current software priority level of the interrupt routine and recovered when the CC register is

O popped.

54/124

Share Link: