ST7LITE20F2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7LITE20F2
STMicroelectronics
'ST7LITE20F2' PDF : 166 Pages View PDF
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Instruction set
12.1.5
12.1.6
Indirect (short, long)
The required data byte to do the operation is found by its memory address, located in
memory (pointer).
The pointer address follows the opcode. The indirect addressing mode consists of two
submodes:
● Indirect (short)
The pointer address is a byte, the pointer size is a byte, thus allowing 00 - FF
addressing space, and requires 1 byte after the opcode.
● Indirect (long)
The pointer address is a byte, the pointer size is a word, thus allowing 64 Kbyte
addressing space, and requires 1 byte after the opcode.
Indirect indexed (short, long)
This is a combination of indirect and short indexed addressing modes. The operand is
referenced by its memory address, which is defined by the unsigned addition of an index
register value (X or Y) with a pointer value located in memory. The pointer address follows
the opcode.
The indirect indexed addressing mode consists of two submodes:
● Indirect indexed (short)
The pointer address is a byte, the pointer size is a byte, thus allowing 00 - 1FE
addressing space, and requires 1 byte after the opcode.
● Indirect indexed (long)
The pointer address is a byte, the pointer size is a word, thus allowing 64 Kbyte
addressing space, and requires 1 byte after the opcode.
TIable 52. Long and short instructions supporting direct, indexed, indirect and
indirect indexed addressing modes
Long and short instructions
Function
LD
CP
AND, OR, XOR
ADC, ADD, SUB, SBC
BCP
Load
Compare
Logical operations
Arithmetic Additions/Subtractions operations
Bit Compare
TIable 53. Short instructions supporting direct, indexed, indirect and indirect
indexed addressing modes
Short instructions only
Function
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit operations
Doc ID 8349 Rev 5
113/166
Share Link: 