I/O ports
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Note:
Refer to the Section 10.7: Device-specific I/O port configuration for device specific
information.
Table 22. I/O port mode options(1)
Configuration mode
Pull-up P-buffer
Diodes
to VDD
to VSS
Floating with/without interrupt
Off
Input
Off
Pull-up with/without interrupt
On
On
Push-pull
On
On
Off
Output Open drain (logic level)
Off
True open drain
NI
NI
NI(2)
1. Legend:
NI - not implemented
Off - implemented not activated
On - implemented and activated.
2. The diode to VDD is not implemented in the true open drain pads. A local protection between the pad and
VOL is implemented to protect the device against positive stress.
Table 23. I/O configurations
I/O port
Hardware configuration
Input(1)
VDD
NOTE 3
RPU
Pull-up
condition
Pad
DR register access
DR
W
register
R
Databus
From
other
pins
Interrupt
condition
Combinational
logic
Alternate input
To on-chip peripheral
External interrupt
source (eix)
Polarity
selection
Analog input
66/166
Doc ID 8349 Rev 5