ST7LITE25F2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7LITE25F2
STMicroelectronics
'ST7LITE25F2' PDF : 170 Pages View PDF
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Supply, reset and clock management
7.5.2
Note:
Asynchronous external RESET pin
The RESET pin is both an input and an open-drain output with integrated RON weak pull-up
resistor. This pull-up has no fixed value but varies in accordance with the input voltage. It
can be pulled low by external circuitry to reset the device.
See Section 13: Electrical characteristics for more details.
A RESET signal originating from an external source must have a duration of at least
th(RSTL)in in order to be recognized (see Figure 16: RESET sequences). This detection is
asynchronous and therefore the MCU can enter reset state even in HALT mode.
Figure 15. Reset block diagram
VDD
RESET
RON
Filter
Internal
reset
Pulse
generator
WATCHDOG RESET
Illegal OPCODE RESET
LVD RESET
Note:
7.5.3
7.5.4
See Section 12.2.1: Illegal opcode reset for more details on illegal opcode reset conditions.
The RESET pin is an asynchronous signal which plays a major role in EMS performance. In
a noisy environment, it is recommended to follow the guidelines mentioned in Section 13:
Electrical characteristics.
External power-on RESET
If the LVD is disabled by option byte, to start up the microcontroller correctly, the user must
ensure by means of an external reset circuit that the reset signal is held low until VDD is over
the minimum level specified for the selected fOSC frequency.
A proper reset signal for a slow rising VDD supply can generally be provided by an external
RC network connected to the RESET pin.
Internal low voltage detector (LVD) RESET
Two different RESET sequences caused by the internal LVD circuitry can be distinguished:
● Power-on RESET
● Voltage drop RESET.
The device RESET pin acts as an output that is pulled low when VDD<VIT+ (rising edge) or
VDD<VIT- (falling edge) as shown in Figure 16: RESET sequences.
The LVD filters spikes on VDD larger than tg(VDD) to avoid parasitic resets.
Doc ID 8349 Rev 5
39/166
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