ST7LITE25F2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7LITE25F2

8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI

STMicroelectronics 

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On-chip peripherals

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

Figure 39. Input capture timing diagram

fCOUNTER

COUNTER 01h

02h

03h

04h

05h

06h

07h

08h

09h

0Ah

ATIC PIN

ICF FLAG

ICR REGISTER

xxh

INTERRUPT

ATICR READ

INTERRUPT

04h

09h

t

11.2.4

Low power modes

Table 33. Effect of low power modes

Mode

Description

SLOW

WAIT

ACTIVE-HALT

HALT

The input frequency is divided by 32

No effect on AT timer

AT timer halted except if CK0=1, CK1=0 and OVFIE=1

AT timer halted

11.2.5

Interrupts

Table 34. Interrupts events

Interrupt event(1)

Event

flag

Enable

Control bit

Exit from

WAIT

Exit from

HALT

Exit from

ACTIVE-HALT

Overflow event

OVF

OVIE

Yes

No

Yes(2)

IC event

ICF

ICIE

Yes

No

No

CMP event

CMPF0

CMPIE

Yes

No

No

1. The CMP and IC events are connected to the same interrupt vector. The OVF event is mapped on a

separate vector (see Interrupts chapter). They generate an interrupt if the enable bit is set in the ATCSR

register and the interrupt mask in the CC register is reset (RIM instruction).

2. Only if CK0=1 and CK1=0 (fCOUNTER = fLTIMER)

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Doc ID 8349 Rev 5

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