STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
2 STA310 AUDIO DECODER PIN DESCRIPTION (continued)
Pin Number
68
Name
LRCLK
Type
O
Word Clock for the DAC
Function
72
PCM_OUT0
O Data from a Prologic downmix (VCR_L/VCR_R)
73
PCM_OUT1
O
Data for the first DAC (Left/Right)
76
PCM_OUT2
O Data for the second DAC (Centre/Sub)
77
PCM_OUT3
O Data for the third DAC (LeftSur/RightSur)
IEC958 Interface (S/PDIF) - One Output Port., One Input Ports.
58
I958OUT
O S/PDIF Signal
25
SPDP
I First differential input of S/P DIF port
24
SPDN
I Second differential input of S/P DIF port
26
SPDF
I External Filter
28
VDDA
I
Analog VDD for S/P DIF Input port
29
GNDA
I Analog GND for S/P DIF Input port
STATUS INFORMATION
PCM Related Information
54
SFREQ
O Then high, indicates that the sampling freq. is either 44.1Khz or
22.05Khz.
When low, indicates that the sampling frequency is either 32 Khz,
48 Khz, 24 Khz or 16Khz.
57
DEEMPH
O Indicates if de-emphasis is performed.
Audio Video Synchronization
59
PTSB
O Indicates that a PTS has been detected, active low.
Other Signals
31
CLK
I Master Clock Input Signal.
36
RESET
I(2) Reset signal input, active low.
52
TESTB
I(2) Reserved pin: to be connected to VDD
49
SMODE
I
Reserved pin : to be connected to GND
RS232 Interface
8
RS232RX
I
9
RS232TX
O
PLLs INTERFACES
64
CLKOUT
O System clock output with programmable division ratio
27
PLLAF
I External Filter For Audio PLL.
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