STI5512 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STI5512' PDF : 23 Pages View PDF
CONFIDENTIAL The 5 pairs of signals are:
1284notSelectIn
1284notInit
1284notAutoFd
1284notFault
1284Select
1284PError
1284HostLogicH
1284Busy
1284notStrobe
1284notAck
Table 1 1284 mode signals
STi5512
IEEE 1394 Link Layer Interface
The Link Layer Interface (LLI) facilitates the transfer of MPEG (or other) data from PID streams selected in the PTI to an
external IEEE 1394 A/V Link layer controller. The LLI is bidirectional and so may also receive MPEG and other data
which can be fed back into the PTI for demultiplexing or descrambling or both. The external link layer controller must
support the IEC 61883 A/V digital interface specification and all its time-stamping requirements.
SmartCard interfaces
The SmartCard interfaces support SmartCards that are compliant with ISO7816-3 and use asynchronous protocol.
Each interface is implemented with a UART (ASC), dedicated programmable clock generator, and eight bits of parallel
IO port.
PWM and counter module
This module includes three separate pulse width modulator (PWM) generators using a shared counter, plus four timer-
compare and three capture channels sharing a second counter.
The counters can be clocked from a pre-scaled clock, using the 27 MHz ClockIn for the PWM counter and the system
clock for the capture/compare counter. The event on which the timer value is captured is also programmable.
The PWM counter is 8-bit with 8-bit registers to set the output high time. The capture/compare counter and the compare
and capture registers are 32-bit.
Parallel IO module
Forty bits of parallel IO are provided. Each bit is programmable as an output or an input. The output can be configured
as a totem pole or open drain driver. Input compare logic is provided which can generate an interrupt on any change of
any input bit.
Many pins of the STi5512 device are multi-functional, and can either be configured as PIO or connected to an internal
peripheral signal such as a UART or SSC.
Teletext
The teletext connects to the internal digital encoder using a request and data protocol. It translates teletext data to and
from memory. It has two modes of operation; teletext data in and teletext data out.
In teletext data out mode, the teletext interface uses DMA to retrieve teletext data from memory, and serializes the data
for transmission to the composite video encoder.
In teletext data in mode, teletext data is extracted from the composite video signal and is fed into the teletext interface
as a serial stream. The teletext interface assembles the data and uses DMA to pass this data to memory.
Low power controller module
The low power controller module provides low power modes and a watchdog timer.
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