STI5512 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

STI5512

SET TOP BOX BACKEND DECODER WITH INTEGRATED HOST PROCESSOR

STMicroelectronics 

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CONFIDENTIAL STi5512

The STi5512 uses the ST20 macrocell library to provide all of the peripheral hardware modules required. These

include:

• High performance internal SRAM and cache subsystem

• I2C interfaces to other devices in the set top box

• Interrupt controller for internal and external interrupts

• Programmable memory interface supporting ROM, SRAM and DRAM/SDRAM. SDRAM is supported at the CPU

clock rate, 60 MHz.

• PWM/timer module for control of system clock VCXOs

• Programmable I/O pins

• UART serial I/O interface to modem and auxiliary ports - including hardware handshake

• Smart card interfaces including the ability to use the 16 byte transmit and receive FIFOs

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