STLC1502 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC1502' PDF : 81 Pages View PDF
STLC1502
Figure 6: EDM block diagram
It is possible to connect up to 4 external chips with x8, x16, and x32 data bus. Each memory bank space is
8Mbytes big so that a standard 64Mbit DRAM device can be connected. It is not possible to use a single
32Mbytes memory device.
It is the responsibility of the ARM code to properly configure the EDM block to initialize the DRAM at startup.
The external memory is mapped by the EDM interface as shown in Fig. 7.
10000000
13FFFFFF
EDM
External
DRAM
10000000
EDM_CS0
107FFFFF
EDM_CS1 10800000
10FFFFFF
11000000
EDM_CS2
117FFFFF
11800000
EDM_CS3
11FFFFFF
12000000
Reserved
13FFFFFF
Figure 7: EDM memory map
In the following table there is the list of the available external signals of the EDM interface.
NAME
EDM_CS(3:0)
Signal type
OUT
EDM_CLK
OUT
EDM_CLKEN OUT
Description
Chip Select. Asserted when the EDM
decodes the proper address space in order
to select the right external device. To be con-
nected to RAS signal in case of use of EDO
memories
SDRAM Memory clock (same as ARM
clock). Not used with EDO.
SDRAM clock enable. Not used with EDO.
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