STLC5046 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC5046' PDF : 27 Pages View PDF
STLC5046
ted in the corresponding timeslot on DX output.
>00h:Digitalgain is inserted in the TX path equalto:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GX0=1: 0dB gain (value = FFh):
1
1
1
1
1
1
1
1
GX0=0: -3.5dB gain (value = 8Fh):
1
0
0
0
1
1
1
1
Transmit Gain channel #2 (GTX2)
Addr=0Dh; Reset Value=00h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h: Stop any trasmit signal, null level is transmit-
ted in the corresponding timeslot on DX output.
>00h:Digitalgain is inserted in the TX path equalto:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GX0=1: 0dB gain (value = FFh):
1
1
1
1
1
1
1
1
GX0=0: -3.5dB gain (value = 8Fh):
1
0
0
0
1
1
1
1
Transmit Gain channel #3 (GTX3)
Addr=0Eh; Reset Value=00h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h:Stop any trasmit signal, null level is transmit-
ted in the corresponding timeslot on DX output.
>00h:Digitalgain is inserted in the TX path equalto:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GX0=1: 0dB gan (value = FFh):
1
1
1
1
1
1
1
1
GX0=0: -3.5dB gain (value = 8Fh):
1
0
0
0
1
1
1
1
Receive Gain channel #0 (GRX0)
Addr=0Fh; Reset Value=00h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h:Stop any received signal, AGND level is
forced on the VFRO0 analog output.
>00h:Digitalgain is inserted in the RX path equalto:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GR0=1: -0.8dB gain (value = E2h):
1
1
1
0
0
0
1
0
GR0=0: -2.36dB gain (value = AFh):
1
0
1
0
1
1
1
1
Overall gain including also RXG:
GR0 = 1:-0.8dB; GR0 = 0: -4.3dB
Receive Gain channel #1 (GRX1)
Addr=10h; Reset Value=00h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h:Stop any received signal, AGND level is
forced on the VFRO1 analog output.
>00h:Digitalgain is inserted in the RX path equalto:
20log[0.25+0.75*(progr.value/256)]
Pin strap values:
GR1=1: -0.8dB gain (value = E2h):
1
1
1
0
0
0
1
0
GR1=0: -2.36dB gain (value = AFh):
1
0
1
0
1
1
1
1
Overall gain including also RXG:
GR1= 1:-0.8dB; GR1 = 0: -4.3dB
Receive Gain channel #2 (GRX2)
Addr=11h; Reset Value=00h
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
00h:Stop any received signal, AGND level is
forced on the VFRO2 analog output.
>00h:Digitalgain is inserted in the RX path equalto:
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