STM32F373xx
Electrical characteristics
Figure 25. I2S slave timing diagram (Philips protocol)(1)
&32/
WF&.
&32/
:6LQSXW
6'WUDQVPLW
6'UHFHLYH
WZ&.+
WZ&./
WK:6
WVX:6
/6%WUDQVPLW
WVX6'B65
/6%UHFHLYH
06%WUDQVPLW
06%UHFHLYH
WY6'B67
%LWQWUDQVPLW
WK6'B65
%LWQUHFHLYH
WK6'B67
/6%WUDQVPLW
/6%UHFHLYH
DLE
1. Measurement points are done at 0.5 VDD level and with external CL = 30 pF.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
Figure 26. I2S master timing diagram (Philips protocol)(1)
TF#+
TR#+
#0/,
#0/,
73 OUTPUT
3$TRANSMIT
3$RECEIVE
TC#+
TW#+(
TV73
TW#+,
TH73
,3" TRANSMIT
-3" TRANSMIT
TV3$?-4
"ITN TRANSMIT
TSU3$?-2
,3" RECEIVE
-3" RECEIVE
TH3$?-2
"ITN RECEIVE
TH3$?-4
,3" TRANSMIT
,3" RECEIVE
AIB
1. Measurement points are done at 0.5 VDD level and with external CL = 30 pF.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
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