STM32F373xx
Electrical characteristics
Equation
RSRC <
f-1-A--:--D--R-C---S-×--R----CC-----Am---D--aT-C--x-S--×--f--o--l-n-r--m-(---2--u-N--l--a+----2---)
–
RADC
The formula above (Equation 1) is used to determine the maximum external signal source
impedance allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Ts (cycles)
1.5
7.5
13.5
28.5
41.5
55.5
71.5
239.5
1. Guaranteed by design.
Table 61. RSRC max for fADC = 14 MHz(1)
tS (µs)
0.11
0.54
0.96
2.04
2.96
3.96
5.11
17.1
RSRC max (kΩ)
0.4
5.9
11.4
25.2
37.2
50
50
50
Table 62. ADC accuracy(1)(2) (3)
Symbol
Parameter
Test conditions
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
EL Integral linearity error
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
EL Integral linearity error
ET Total unadjusted error
EO Offset error
EG Gain error
ED Differential linearity error
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 3 V to 3.6 V
TA = 25 °C
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 2.7 V to 3.6 V
TA = -40 to 105 °C
fADC = 14 MHz, RSRC < 10 kΩ,
VDDA = 2.4 V to 3.6 V
TA = 25 °C
EL Integral linearity error
1. ADC DC accuracy values are measured after internal calibration.
Typ
±1.3
±1
±0.5
±0.7
±0.8
±3.3
±1.9
±2.8
±0.7
±1.2
±3.3
±1.9
±2.8
±0.7
±1.2
Max(4) Unit
±3
±2
±1.5
LSB
±1
±1.5
±4
±2.8
±3
LSB
±1.3
±1.7
±4
±2.8
±3
LSB
±1.3
±1.7
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