STV0056AF View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STV0056AF' PDF : 27 Pages View PDF
STV0056AF
I2C PROTOCOL
1) WRITING to the chip
S-Start Condition
P-Stop Condition
CHIP ADDR - 7 bits. Programmable 06H or 46H (STV0056AF only) with Pin HA.
W-Write/Read bit is the 8th bit of the chip address.
A-ACKNOWLEDGE after receiving 8 bits of data/adress.
REG ADDR
Address of register to be written to, 8 bits of which bits 3, 4, 5, 6 & 7 are ’X’ or
don’t care ie only the first 3 bits are used.
DATA
8 bits of data being written to the register. All 8 bits must be written to at the same
time.
REG ADDR/A/DATA/A
Example :
can be repeated, the write process can continue untill terminated with a STOP
condition. If the REG ADDR is higher than 07 then IIC PROTOCOL will still be
met (ie an A generated).
S 06 W A 00 A 55 A 01 A 8F
AP
2) READING from the chip
When reading, there is an auto-incrementfeature. This means any read command always starts by reading
Reg 8 and will continue to read the following registers in order after each acknowledge or until there is no
acknowledge or a stop. This function is cyclic that is it will read the same set of registers without
re-addressing the chip. There are two modes of operation as set by writing to bit 7 of register 0. Read 3
registers in a cyclic fashion or all 5 registers in a cyclic fashion. Note only the last 5 of the 11 registers can
be read.
Reg0 bit 7 = L ⇒ Start / chip add / R / A / Reg 8 / A/ Reg 9 / A / Reg 0A / A / Reg 8 / A / Reg 9 / A / Reg 0A
/... / P /
Reg0 bit 7 = H ⇒ Start / chip add / R / A / Reg 8 / A / Reg 9 / A / Reg 0A / A / Reg 7 / A / Reg 6 / A / Reg 8
/ A / Reg 9 / A / Reg 0A / A / Reg 7 / A / Reg 6 / ... / P /
CONTROL REGISTERS
Reg 0 write only
Bit (default 00HEX)
0 L Select 5 bits audio volume control 00H = MUTE
1 L Select 5 bits audio volume control 01H = -26.75dB
2 L Select 5 bits audio volume control : : : : :
3 L Select 5 bits audio volume control 1.25dB steps up to
4 L Select 5 bits audio volume control 1FH = +12dB
5 L Audio mux switch K4 - ANRS I/P select (L = PLL)
6 L Audio mux switch K3 - ANRS select (L = no ANRS, H = ANRS)
7 L L = read 3 registers, H = read 5 registers
Reg 1 write only
Bit (default 00HEX)
0 L Select video gain bits
1 L Select video gain bits 00H = 0dB
2 L Select video gain bits 01H = +0.202dB
3 L Select video gain bits 02H = +0.404dB
4 L Select video gain bits n = + 0.202 dB * n
5 L Select video gain bits 3FH = + 12.73 dB
6 L Selected video invert (H = inverted, L = non inverted)
7 L Video deemphasis 1 / Video deemphasis 2 (L : VID De-em 1)
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