STV9432TAP View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STV9432TAP
STMicroelectronics
'STV9432TAP' PDF : 25 Pages View PDF
STV9432TAP
Table 2 CLUT Block Selection
CLU3
0
1
CLU[2:0]
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Code Name
Col 0
Col 1
Col 2
Col 3
Col 4
Col 5
Col 6
Col 7
Col 0
Col 1
Col 2
Col 3
Col 4
Col 5
Col 6
Col 7
Command Code
(hex)
00
01
02
03
04
05
06
07
00
01
02
03
04
05
06
07
12.2 - OSD CONTROL REGISTERS
Line Duration (reset value: 20H)
4030
VSP
HSP
LD6
LD5
LD4
Ram @(hex)
@4020
@4021
@4022
@4023
@4024
@4025
@4026
@4027
@4028
@4029
@402A
@402B
@402C
@402D
@402E
@402F
Reset Value (hex)
07
16
25
34
43
52
61
70
70
61
52
43
34
25
16
07
LD3
LD2
LD1
VSP
HSP
LD[6:1]
: V-SYNC active edge selection
= 0, falling egde,
= 1, rising edge.
: HFLY active edge selection
= 0, rising egde,
= 1, falling edge.
: LINE DURATION
LD0 = 0
LD1 = 2 periods of character
One character period is 12 pixels long.
Top Margin (reset value: 30H)
4031
M9
M8
M7
M6
M5
M4
M3
M2
M[9:2]
: TOP MARGIN height from the VSYNC reference edge.
M0 = 0, M1 = 0
M2 = 4 scan lines
Note: The top margin is displayed before the first strip of descriptor list. It can be black if FBK of DISPLAY CONTROL
register is set or transparent if FBK is clear.
Horizontal Delay (reset value: 20H)
4032
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
DD[7:0]
: HORIZONTAL DISPLAY DELAY from the HSYNC reference edge to the 1st pixel position of the charac-
ter strips.
Unit = 6 pixel periods. Minimum value is 08H. First pixel position = [DD[7:0] - 6] x 6 + 54 with
DD[7:0] = 0,2,4,6 delay is 54 pixel and with DD[7:0] = 1,3,5 delay is 60 pixel
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