SX1781
PLL Frequency Synthesizer with integrated VCO
ADVANCED COMMUNICATIONS & SENSING
FINAL
DATASHEET
1. Pin Description
Table 1 Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
VDDD
CLK
NC
VSSD
CSB
MOSI
MISO
SCK
VSSA
Out_N
Out_P
VDDA
VSSF
VDDF
SLEEPB
LD
Pin Type
I
I
I
O
I
O
O
I
O
Description
Power Supply
PLL Reference Signal
Do not Connect
Ground
SPI Line Select
SPI Data Input
SPI Data Output (High Z when unused)
SPI Clock
Ground
RF Complementary Output
RF Output
Power Supply, Output Buffers
Ground
Power Supply
When low, the circuit is in deep sleep mode
PLL Lock Detect Output (active high)
Note: the thermal pad under the SX1781 should be connected to ground for an optimal thermal dissipation.
Rev 1 - November 2008
©2008 Semtech Corp.
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