XE8801A – SX8801R
Using look-up Table 16-22 or the graph plotted in Figure 16-6, resolution can be set between 6 and 16 bits. Notice
that, because of 16-bit register use for the ADC output, practical resolution is limited to 16 bits, i.e. n ≤ 16. Even if
the resolution is truncated to 16 bit by the output register size, it may make sense to set OSR and NELCONV to higher
values in order to reduce the influence of the thermal noise in the PGA (see section 16.8.4).
16.7.6 Conversion Time & Throughput
As explained using Figure 16-5, conversion time is given by:
TCONV = (N ELCONV ⋅ (OSR + 1) + 1) / f S (s)
(Eq. 16)
and throughput is then simply 1/TCONV. For example, consider an over-sampling ratio of 256, 2 elementary
conversions, and a sampling frequency of 500kHz (SET_OSR = "101", SET_NELC = "01", fRC = 2MHz, and FIN =
"00"). In this case, using Table 16-23, the conversion time is 515 sampling periods, or 1.03ms. This corresponds to a
throughput of 971Hz in continuous-time mode. The plot of Figure 16-7 illustrates the classic trade-off between
resolution and conversion time.
SET_OSR
[2:0]
000
001
010
011
100
101
110
111
00
10
18
34
66
130
258
514
1026
SET_NELC[1:0]
01
10
19
37
35
69
67
133
131
261
259
517
515
1029
1027 2053
2051 4101
11
73
137
265
521
1033
2057
4105
8201
Table 16-23 Normalized conversion time (TCONV ⋅fS) vs. SET_OSR[2:0] and SET_NELC[1:0](normalized
to sampling period 1/fS)
16.0
14.0
12.0
10.0
SET_NELC
8.0
11
10
6.0
01
00
4.0
10.0
100.0
1000.0
10000.0
Normalized Conversion Time - TCONV*fS [-]
Figure 16-7 Resolution vs. normalized conversion time for different SET_NELC[1:0]
16.7.7 Output Code Format
The ADC output code is a 16-bit word in two's complement format (see Table 16-24). For input voltages outside the
range, the output code is saturated to the closest full-scale value (i.e. 0x7FFF or 0x8000). For resolutions smaller
than 16 bits, the non-significant bits are forced to the values shown in Table 16-25. The output code, expressed in
LSBs, corresponds to:
© Semtech 2005
16-15
www.semtech.com