XE8801A – SX8801R
Pos.
7–4
3
2
1
0
RegSysWD
-
WDKey[3]
WDCounter[3]
WDKey[2]
WDCounter[2]
WDKey[1]
WDCounter[1]
WDKey[0]
WDCounter[0]
Rw Reset
r
0000
w
0 resetcold
r
w
0 resetcold
r
w
0 resetcold
r
w
0 resetcold
r
Table 6-3. RegSysWD register
Function
unused
Watchdog Key bit 3
Watchdog counter bit 3
Watchdog Key bit 2
Watchdog counter bit 2
Watchdog Key bit 1
Watchdog counter bit 1
Watchdog Key bit 0
Watchdog counter bit 0
6.4 Reset handling capabilities
There are 5 reset sources:
• Power On Reset (POR)
• External reset from the RESET pin
• Programmable Port A input combination
• Programmable watchdog timer reset
• Programmable BusError reset on processor access outside the allocated memory map
Another reset source is the bit Sleep in the RegSysReset register. This source is fully controlled by software and
is only used during the sleep mode.
Four internal reset signals are generated from these sources and distributed through the system:
• resetcold: is asserted on POR
• resetsystem: is asserted when resetcold or any other enabled reset source is active
• resetpconf: is asserted when resetsystem is active and if the EnResPConf bit in the RegSysCtrl register
is set. This reset is generally used in the different ports. It allows to maintain the port
configuration unchanged while the rest of the circuit is reset.
• resetsleep: is asserted when the circuit is in sleep mode
For the circuits XE8801AM/XE88LC01AM/SX8801R and XE8805AM/XE88LC05AM
(2) For the circuits XE88LC01 and XE88LC05
Table 6-4 shows a summary of the dependency of the internal reset signals on the various reset sources. In all the
tables describing the different registers, the reset source is indicated.
Asserted
reset source
POR
RESET pin (1)
RESET pin (2)
PortA input
Watchdog
BusError
Sleep
resetsystem
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
-
Internal reset signals
resetpconf
when
when
EnResPConf=0 EnResPConf=1
Asserted
Asserted
Asserted
Asserted
-
Asserted
-
Asserted
-
Asserted
-
Asserted
-
-
resetsleep
Asserted
Asserted
-
-
-
-
Asserted
(1) For the circuits XE8801AM/XE88LC01AM/SX8801R and XE8805AM/XE88LC05AM
(2) For the circuits XE88LC01 and XE88LC05
Table 6-4 Internal reset assertion as a function of the reset source.
resetcold
Asserted
Asserted
-
-
-
-
-
© Semtech 2005
www.semtech.com
6-3