SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
7.1 Features
• 3 available clock sources (RC oscillator, quartz oscillator and external clock).
• 2 divider chains: high-prescaler (8 bits) and low-prescaler (15 bits).
• CPU clock disabling in halt mode.
7.2 Overview
The XE8801AM – SX8801R chips can work on different clock sources (RC oscillator, quartz oscillator and external
clock). The clock generator block is in charge of distributing the necessary clock frequencies to the circuit.
Figure 7-1 represents the functionality of the clock block.
The internal RC oscillator drives the high prescaler. This prescaler generates frequency divisions down to 1/256 of
its input frequency. A 32 kHz clock is generated by enabling the quartz oscillator (if present in the product) or by
selecting the appropriate tap on the high prescaler. The low prescaler generates clock signals from 32 kHz down to
1Hz. The clock source for the CPU can be selected from the RC oscillator, the external clock or the 32 kHz clock.
7.3 Register map
pos. RegSysClock
7
CpuSel
6
Extclk
5
EnExtClock
4
BiasRc
3
ColdXtal
2
ColdRC
1
EnableXtal
0
EnableRc
rw
Reset
rw 0 resetsleep
r 0 resetcold
rw 0 resetcold
rw 1 resetcold
r 1 resetsleep
r 1 resetsleep
rw 0 resetsleep
rw 1 resetsleep
function
Select speed for cpuck, 0=RC, 1=xtal or
external clock
External clock detected, 1=available
Enable for external clock, 1=enabled
Enable Rcbias (reduces start-up time of RC).
Xtal in start phase
RC in start phase
Enable Xtal oscillator, 0=disabled, 1=enabled
Enable RC oscillator, 0=disabled, 1=enabled
Table 7-1: RegSysClock register
pos.
7-4
3
2
1
RegSysMisc
--
RCOnPA0
DebFast
OutputCkXtal
0
OutputCpuCk
rw
Reset
r 0000
rw 0 resetsleep
rw 0 resetsleep
rw 0 resetsleep
rw 0 resetsleep
Function
Unused
Start RC on PA[0], 0=disabled, 1=enabled
Debouncer clock speed, 0=256Hz, 1=8kHz
Output Xtal Clock on PB[3], 0=disabled,
1=enabled if EnXtal=1 else PB[3]=0
Output CPU clock on PB[2], 0=disabled,
1=enabled
Table 7-2: RegSysMisc register
pos.
RegSysPre0
7-1 --
0
ResPre
rw
reset
r 0000000
w1 0
r0
Function
Unused
Write 1 to reset low prescaler, but always
reads 0
Table 7-3: RegSysPre0 register
© Semtech 2005
www.semtech.com
7-2
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