XE8801A – SX8801R
The tolerances on the minimal frequency and the drift with supply or temperature can be cancelled using the
software DFLL (digital frequency locked loop) which uses the crystal oscillator as a reference frequency.
7.5.2
Xtal oscillator
7.5.2.1 Xtal configuration
The Xtal operates with an external crystal of 32’768 Hz.
During Xtal oscillator start-up, the first 32768 cycles are masked. The two bits EnableXtal and ColdXtal in register
RegSysClock control the oscillator.
At power-on reset or during sleep mode, EnableXtal is reset and ColdXtal is set (Xtal oscillator is not selected at
start-up). The user can start Xtal oscillator by setting EnableXtal. When the Xtal oscillator starts, bit ColdXtal is
reset after 32768 cycles. Before ColdXtal is reset by the system, the Xtal frequency precision is not guaranteed.
The Xtal oscillator can be stopped by the user by resetting bit EnableXtal.
When the user enters into sleep mode, the Xtal is stopped.
When an external clock is detected (ExtClk = 1) or the EnExtClock is set 1, the EnableXtal bit can not be set to 1.
7.5.2.2 Xtal oscillator specifications
The crystal oscillator has been designed for a crystal with the specifications given in Table 7-8. The oscillator
precision can only be guaranteed for this crystal.
Symbol Description
Min
Fs
Resonance frequency
CL
CL for nominal
frequency
Rm
Motional resistance
Cm
Motional capacitance
1.8
C0
Shunt capacitance
0.7
Rmp
Motional resistance of
4
6th overtone (parasitic)
Q
Quality factor
30k
Typ
32768
8.2
40
2.5
1.1
8
50k
Max
15
100
3.2
2.0
400k
Unit Comments
Hz
pF
kΩ
fF
pF
kΩ
-
Table 7-8. Crystal specifications.
For safe operation, low power consumption and to meet the specified precision, careful board layout is required:
Keep lines OSCIN and OSCOUT short and insert a VSS line in between them.
Connect the crystal package to VSS.
No noisy or digital lines near OSCIN or OSCOUT.
Insert guards where needed.
Respect the board specifications of Table 7-9.
© Semtech 2005
www.semtech.com
7-6