SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
The bits UartEnRx1 and UartEnRx2 are used to enable or disable the reception. When one is set to 1, the
reception is enabled.
The word length (7 or 8 data bits) can be chosen with UartWL. A parity bit is added during transmission or checked
during reception if UartPE is set. The parity mode (odd or even) can be chosen with UartPM.
Setting the bits UartXRx and UartXTx inverts the Rx respectively Tx signals.
The bit UartEcho is used to send the received data automatically back. The transmission function becomes then:
Tx = Rx XOR UartXTx.
14.6.2 Transmission
In order to send data, the transmitter has to be enabled by setting the bit UartEnTx. Data to be sent has to be
written to the register RegUartTx. The bit UartTxFull in RegUartTxSta then goes to 1, indicating to the transmitter
that a new word is available. As soon as the transmitter has finished sending the previous word, it then loads the
contents of the register RegUartTx to an internal shift register and clears the UartTxFull bit. An interrupt is
generated on Irq_uart_Tx at the falling edge of the UartTxFull bit. The bit UartTxBusy in RegUartTxSta shows
that the transmitter is busy transmitting a word.
A timing diagram is shown in Figure 14-1. Data are sent LSB first.
New data should be written to the register RegUartTx only while UartTxFull is 0, otherwise data will be lost.
Asynchronous Transmission
write to RegUartTx
RegUartTx
word 1
reguarttx_shift
word 1
shift clock
Tx
start
b0
b1
UartTxBusy
UartTxFull
Irq_uart_Tx
b6/7 parity
stop
Asynchronous Transmission (back to back)
write to RegUartTx
word 1
word 2
RegUartTx
word 1
word 2
reguarttx_shift
word 1
shift clock
Tx
start
b0
UartTxBusy
UartTxFull
Irq_uart_Tx
Figure 14-1. Uart transmission timing diagram.
word 2
b6/7
stop
start
© Semtech 2005
14-5
www.semtech.com
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