T89C51AC2-SLSIM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51AC2-SLSIM' PDF : 121 Pages View PDF
Table 25. Programming Spaces
Write to FCON
FPL3:0
FPS
FMOD1
FMOD0 Operation
5
X
0
0
No action
User
A
X
0
0
Write the column latches in user
space
5
X
0
1
No action
Extra Row
A
X
0
1
Write the column latches in extra row
space
Hardware
5
X
1
0
No action
Security
Byte
A
X
1
0
Write the fuse bits space
5
X
1
1
No action
Reserved
A
X
1
1
No action
Notes:
1. The sequence 5xh and Axh must be executing without instructions between them
otherwise the programming is aborted.
2. Interrupts that may occur during programming time must be disabled to avoid any
spurious exit of the programming mode.
Status of the Flash Memory
The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
Selecting FM1
The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.
Loading the Column Latches
Any number of data from 1 Byte to 128 Bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of Bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 21:
• Save then disable interrupt and map the column latch space by setting FPS bit.
• Load the DPTR with the address to load.
• Load Accumulator register with the data to load.
• Execute the MOVX @DPTR, A instruction.
• If needed loop the three last instructions until the page is completely loaded.
• Unmap the column latch and Restore Interrupt
38 A/T89C51AC2
4127H–8051–02/08
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