T89C51AC2-SLSIM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51AC2-SLSIM' PDF : 121 Pages View PDF
Automatic Address
Recognition
Figure 29. UART Timing in Mode 1
RXD
RI
SMOD0=X
FE
SMOD0=1
D0 D1 D2 D3 D4 D5 D6 D7
Start
bit
Data byte
Stop
bit
Figure 30. UART Timing in Modes 2 and 3
RXD
D0 D1 D2 D3 D4 D5 D6 D7 D8
RI
SMOD0=0
Start
bit
Data byte
Ninth Stop
bit bit
RI
SMOD0=1
FE
SMOD0=1
The automatic address recognition feature is enabled when the multiprocessor commu-
nication feature is enabled (SM2 bit in SCON register is set).
Implemented in the hardware, automatic address recognition enhances the multiproces-
sor communication feature by allowing the serial port to examine the address of each
incoming command frame. Only when the serial port recognizes its own address will the
receiver set the RI bit in the SCON register to generate an interrupt. This ensures that
the CPU is not interrupted by command frames addressed to other devices.
If necessary, you can enable the automatic address recognition feature in mode 1. In
this configuration, the stop bit takes the place of the ninth data bit. Bit RI is set only when
the received command frame address matches the device’s address and is terminated
by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and
a broadcast address.
Note: The multiprocessor communication and automatic address recognition features cannot
be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).
52 A/T89C51AC2
4127H–8051–02/08
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