I2C bus
TDA75612LV
9.3.3
9.3.4
Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 23). The receiver** has to pull-down (LOW) the SDA line during the
acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.
* Transmitter:
master (µP) when it writes an address to the TDA75612LV
slave (TDA75612LV) when the µP reads a data byte from TDA75612LV
** Receiver:
slave (TDA75612LV) when the µP writes an address to the TDA75612LV
master (µP) when it reads a data byte from TDA75612LV
Figure 21. Data validity on the I2C bus
3$!
3#,
$!4! ,).%
34!",% $!4!
6!,)$
#(!.'%
$!4!
!,,/7%$
Figure 22. Timing diagram on the I2C bus
'!0'03
3#,
3$!
)#"53
34!24
34/0
Figure 23. Acknowledge on the I2C bus
'!0'03
3#,
3$!
34!24
-3"
!#+./7,%$'-%.4
&2/- 2%#%)6%2
'!0'03
26/35
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