Product Datasheet
Jan 4, 2012
TGA4953-SL
Production - Initial Alignment – IRZ Bias Procedure
Vdd=8V, Vo=6Vamp
(Hot Pluggable)
Bias Network Initial Conditions -
Vg1=-1.5V
Vg2=-2.0V
Vctrl1=+1.0V
Vctrl2=+2.0V
Vdd=8V
Bias ON
1. Disable the output of MUX
2. Apply Vg1, Vg2, Vctrl1, Vctrl2, and Vdd in any sequence.
Bias OFF
Remove Vg1, Vg2, Vctrl1, Vctrl2, and
Vdd in any sequence.
Note: If Vdd is applied first Idd could reach near 400mA.
3. Make Vg1 more positive until Idd=80mA.
- This is Id1 (current into the first stage)
- Typical value for Vg1 is -0.55V
4. Enable the output of the MUX.
- Set Vin=800mV
5. Crossover Adjust: Adjust Vg2 slightly negative to push the crossover towards zero
level.
6. Output Swing Adjust: Adjust Vctrl2 slightly positive to increase output swing or adjust
Vctrl2 slightly negative to decrease the output swing.
7. Duty Cycle Fine Tune: Adjust Vctrl1 slightly negative to reduce duty cycle percentage.
8. Readjust Vctrl2 for proper output amplitude.
TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com 16