TS4972 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TS4972' PDF : 30 Pages View PDF
TS4972
Application Information
Regarding the load we have:
VOUT = V PEAK sinωt (V)
and
IOUT
=
V-----O----U----T---
RL
(A)
and
POUT
=
V-----P----E---A---K----2---
2RL
(W)
Then, the average current delivered by the supply
voltage is:
ICC AVG = 2V-----Pπ---E-R---A--L-K---- (A)
The power delivered by the supply voltage is
Psupply = Vcc IccAVG (W)
Then, the power dissipated by the amplifier is
Pdiss = Psupply - Pout (W)
Pdiss = 2---------2---V-----c---c-- POUT – POUT (W)
π RL
and the maximum value is obtained when:
∂--∂--P--P---d-O--i--sU----sT--- = 0
and its value is:
Pdiss max
=
2 Vcc2
π2RL
(W)
Remark : This maximum value is only depending
on power supply voltage and load values.
The efficiency is the ratio between the output
power and the power supply
η = P-----sP---u--O--p--U--p-T---l-y-- =---π--4-V---V--P--C-E---C-A---K--
The maximum theoretical value is reached when
Vpeak = Vcc, so
π-4--- = 78.5%
■ Decoupling of the circuit
Two capacitors are needed to bypass properly the
TS4972, a power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has especially an influence on the THD+N in
high frequency (above 7kHz) and indirectly on the
power supply disturbances.
With 100µF, you can expect similar THD+N
performances like shown in the datasheet.
If Cs is lower than 100µF, in high frequency
increases, THD+N and disturbances on the power
supply rail are less filtered.
To the contrary, if Cs is higher than 100µF, those
disturbances on the power supply rail are more
filtered.
Cb has an influence on THD+N in lower
frequency, but its function is critical on the final
result of PSRR with input grounded in lower
frequency.
If Cb is lower than 1µF, THD+N increase in lower
frequency (see THD+N vs frequency curves) and
the PSRR worsens up
If Cb is higher than 1µF, the benefit on THD+N in
lower frequency is small but the benefit on PSRR
is substantial (see PSRR vs. Cb curve : fig.12).
Note that Cin has a non-negligible effect on PSRR
in lower frequency. Lower is its value, higher is the
PSRR (see fig. 13).
■ Pop and Click performance
Pop and Click performance is intimately linked
with the size of the input capacitor Cin and the
bias voltage bypass capacitor Cb.
Size of Cin is due to the lower cut-off frequency
and PSRR value requested. Size of Cb is due to
THD+N and PSRR requested always in lower
frequency.
Moreover, Cb determines the speed that the
amplifier turns ON. The slower the speed is, the
softer the turn ON noise is.
The charge time of Cb is directly proportional to
the internal generator resistance 50kΩ.
Then, the charge time constant for Cb is
τb = 50kΩxCb (s)
As Cb is directly connected to the non-inverting
input (pin 2 & 3) and if we want to minimize, in
amplitude and duration, the output spike on Vout1
(pin 5), Cin must be charged faster than Cb. The
charge time constant of Cin is
τin = (Rin+Rfeed)xCin (s)
22/30
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