µPD703014A, 703014AY, 703015A, 703015AY, 703017A, 703017AY
Clock Timing
X1, XT1 (input)
CLKOUT (output)
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<8>
<9>
<10>
(1) Timing of pins other than CLKOUT, ports 4, 5, 6, and 9
(TA = –40 to +85°C, VDD = BVDD = 2.7 to 3.6 V, VSS = BVSS = 0 V, Output pin load capacitance: CL = 50 pF)
Parameter
Output rise time
Output fall time
Symbol
tOR
<11>
tOF
<12>
Conditions
MIN.
MAX.
Unit
20
ns
20
ns
(2) Timing of pins other than CLKOUT, ports 4, 5, 6, and 9
(TA = –40 to +85°C, VDD = BVDD = 3.0 to 3.6 V, VSS = BVSS = 0 V, Output pin load capacitance: CL = 50 pF)
Parameter
Output rise time
Output fall time
Symbol
tOR
<11>
tOF
<12>
Conditions
MIN.
MAX.
Unit
20
ns
20
ns
Output signal
0.8VDD
0.4 V
<12>
0.8VDD
0.4 V
<11>
30
Data Sheet U14526EJ2V0DS00