UPD78P058F View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
MFG CO.
'UPD78P058F' PDF : 415 Pages View PDF
CHAPTER 1 GENERAL
Figure 1-13. Block Diagram of µPD780308 Subseries
TO0/P30
TI00/INTP0/P00
TI01/INTP1/P01
TO1/P31
TI1/P33
16-bit TIMER/
EVENT COUNTER
8-bit TIMER/EVENT
COUNTER 1
TO2/P32
TI2/P34
8-bit TIMER/EVENT
COUNTER 2
WATCHDOG TIMER
SI0/SB0/P25
SO0/SB1/P26
SCK0/P27
SI2/RXD/P70
SO2/TXD/P71
RXD/P114
TXD/P113
SCK2/ASCK/P72
SI3/P110
SO3/P111
SCK3/P112
ANI0/P10-
ANI7/P17
AVDD
AVSS
AVREF
INTP0/P00-
INTP5/P05
WATCH TIMER
SERIAL
INTERFACE 0
SERIAL
INTERFACE 2
SERIAL
INTERFACE 3
A/D CONVERTER
INTERRUPT
CONTROL
BUZ/P36
BUZZER OUTPUT
PCL/P35
CLOCK OUTPUT
CONTROL
78K/0
CPU CORE
ROM
RAM
VDD0, VSS0, IC
VDD1, VSS1, (VPP)
PORT0
PORT1
P00
P01-P05
P07
P10-P17
PORT2
P25-P27
PORT3
P30-P37
PORT7
P70-P72
PORT8
P80-P87
PORT9
P90-P97
PORT10
P100-P103
PORT11
P110-P117
LCD
CONTROLLER/
DRIVER
SYSTEM
CONTROL
S0-S23
S24/P97-
S31/P90
S32/P87-
S39/P80
COM0-COM3
VLC0-VLC2
BIAS
fLCD
RESET
X1
X2
XT1/P07
XT2
Remarks 1. The internal ROM capacity differs depending on the model.
2. ( ): µPD78P0308
35
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