Production Data
WM8956
HEADPHONE JACK DETECT
The GPIO1, LINPUT3/JD2 and RINPUT3/JD3 pins can be selected as headphone jack detect inputs
to automatically disable the speaker output and enable the headphone output e.g. when a headphone
is plugged into a jack socket. In this mode, enabled by setting HPSWEN, the headphone detect input
pin switches between headphone and speaker outputs (e.g. when the pin is connected to a
mechanical switch in the headphone socket to detect plug-in). The HPSEL[1:0] bits select the input
pin used for this function. The HPSWPOL bit reverses the pin’s polarity. Note that the LOUT1,
ROUT1, SPKL and SPKR bits in register 26 must also be set for headphone and speaker output (see
Table 23 and Table 24).
TOEN must also be set to enable the clock which is used for de-bouncing the jack detect input.
TOCLKSEL selects a fast or slow de-bounce period. Note that SYSCLK must be enabled to use this
function.
When using capless mode, the OUT3CAP bit should be enabled so that OUT3 is enabled/disabled at
the same time as HP_L and HP_R to prevent pop noise.
The debounced headphone detect signal can also be output to the GPIO1 pin (See GPIO section).
This function is not available when using GPIO1 as an input.
When using the GPIO1 pin as a headphone detect input, the ALRCGPIO register bit needs to be set
to 1 (See GPIO section for more information).
Note:
When LINPUT3 or RINPUT3 is used as the headphone detect input, the thresholds become CMOS
levels (0.3 AVDD / 0.7 AVDD).
HPSWEN HPSWPOL
HEADPHONE
DETECT PIN
(LINPUT3/JD2,
RINPUT3/JD3 OR
GPIO1)
L/ROUT1 SPKL/R HEADPHONE
(AND OUT3 (REG. 26) ENABLED
IN
(AND OUT3 IN
CAPLESS
CAPLESS
MODE)
MODE)
(REG. 26)
0
X
X
0
0
no
0
X
X
0
1
no
0
X
X
1
0
yes
0
X
X
1
1
yes
1
0
0
X
0
no
1
0
0
X
1
no
1
0
1
0
X
no
1
0
1
1
X
yes
1
1
0
0
X
no
1
1
0
1
X
yes
1
1
1
X
0
no
1
1
1
X
1
no
Table 23 Headphone Jack Detect Operation
SPEAKER
ENABLED
no
yes
no
yes
no
yes
no
no
no
no
no
yes
w
PD, November 2011, Rev 4.1
39